RISC-V

riscv@programming.dev

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cm0002@digipres.cafe · 2 days ago

felix86 26.02 - x86 on RISC-V

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felix86 26.02 - x86 on RISC-V

cm0002@digipres.cafe · 2 days ago

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cm0002@suppo.fi · 4 days ago

Start Porting Software To RISC-V Today With Our New, Free Online Course

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Start Porting Software To RISC-V Today With Our New, Free Online Course

cm0002@suppo.fi · 4 days ago

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cm0002@digipres.cafe · 3 days ago

RISC-V User-Space Control Flow Integrity / Shadow Stack Appears Finally Ready

www.phoronix.com

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RISC-V User-Space Control Flow Integrity / Shadow Stack Appears Finally Ready

www.phoronix.com

cm0002@digipres.cafe · 3 days ago

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cm0002@suppo.fi · 4 days ago

SpacemiT K3 – World's First RVA23 Standard AI CPU

www.spacemit.com

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SpacemiT K3 – World's First RVA23 Standard AI CPU

www.spacemit.com

cm0002@suppo.fi · 4 days ago

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cm0002@suppo.fi · 4 days ago

The OpenHW Foundation unveils the first industry-ready RISC-V ecosystem to advance European digital sovereignty

www.design-reuse.com

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The OpenHW Foundation unveils the first industry-ready RISC-V ecosystem to advance European digital sovereignty

www.design-reuse.com

cm0002@suppo.fi · 4 days ago

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cm0002@suppo.fi · 6 days ago

Picolibc Picks Up RISC-V Improvements, Hexagon Support & Better POSIX Compliance

www.phoronix.com

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Picolibc Picks Up RISC-V Improvements, Hexagon Support & Better POSIX Compliance

www.phoronix.com

cm0002@suppo.fi · 6 days ago

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cm0002@libretechni.caEnglish · 10 days ago

SpacemiT K3 16-core RISC-V SoC system information and (early) benchmarks

www.cnx-software.com

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SpacemiT K3 16-core RISC-V SoC system information and (early) benchmarks

www.cnx-software.com

cm0002@libretechni.caEnglish · 10 days ago

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cm0002@libretechni.caEnglish · 10 days ago

GNU Guix 1.5 Released With RISC-V Support, Experimental x86_64 GNU Hurd Kernel

www.phoronix.com

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GNU Guix 1.5 Released With RISC-V Support, Experimental x86_64 GNU Hurd Kernel

www.phoronix.com

cm0002@libretechni.caEnglish · 10 days ago

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cm0002@libretechni.caEnglish · 11 days ago

RISC-V Annual Report 2025

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RISC-V Annual Report 2025

cm0002@libretechni.caEnglish · 11 days ago

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cm0002@libretechni.caEnglish · 12 days ago

One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon

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One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon

cm0002@libretechni.caEnglish · 12 days ago

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Eemon@programming.dev · 17 days ago

Upcoming RISC-V Hardware in 2026

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Upcoming RISC-V Hardware in 2026

Eemon@programming.dev · 17 days ago

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cm0002@infosec.pub · 18 days ago

The Final Verification Frontier: How We Battle-Hardened RISC-V for Space

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The Final Verification Frontier: How We Battle-Hardened RISC-V for Space

cm0002@infosec.pub · 18 days ago

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cm0002@infosec.pub · 18 days ago

World RISC-V Days, 23-27 February

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World RISC-V Days, 23-27 February

cm0002@infosec.pub · 18 days ago

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cm0002@infosec.pub · 20 days ago

Milk-V Titan Mini-IX board with UR-DP1000 processor shows RISC-V ecosystem taking shape — M.2, DDR4, and PCIe card support form a kit that you can use out of the box

www.tomshardware.com

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Milk-V Titan Mini-IX board with UR-DP1000 processor shows RISC-V ecosystem taking shape — M.2, DDR4, and PCIe card support form a kit that you can use out of the box

www.tomshardware.com

cm0002@infosec.pub · 20 days ago

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cm0002@suppo.fi · 21 days ago

Andrew "bunnie" Huang Prepares the "dabao," a Dev Board for Baochip's "Mostly-Open" X1 RISC-V MCU

www.hackster.io

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Andrew "bunnie" Huang Prepares the "dabao," a Dev Board for Baochip's "Mostly-Open" X1 RISC-V MCU

www.hackster.io

cm0002@suppo.fi · 21 days ago

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cm0002@suppo.fi · 22 days ago

Linux Lands Safeguard For RISC-V Against Another Microarchitectural Attack Vector

www.phoronix.com

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Linux Lands Safeguard For RISC-V Against Another Microarchitectural Attack Vector

www.phoronix.com

cm0002@suppo.fi · 22 days ago

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cm0002@toast.ooo · 25 days ago

A Glimpse Into V8 Development for RISC-V

riseproject.dev

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A Glimpse Into V8 Development for RISC-V

riseproject.dev

cm0002@toast.ooo · 25 days ago

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cm0002@literature.cafe · 26 days ago

New Box64 v0.4.0 released (x86 to RiSC-V emulator)

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New Box64 v0.4.0 released (x86 to RiSC-V emulator)

cm0002@literature.cafe · 26 days ago

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cm0002@literature.cafe · 26 days ago

Gentoo Linux Made Progress On RISC-V, WSL & More In 2025 While Pulling In Just $12k USD

www.phoronix.com

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Gentoo Linux Made Progress On RISC-V, WSL & More In 2025 While Pulling In Just $12k USD

www.phoronix.com

cm0002@literature.cafe · 26 days ago

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cm0002@mander.xyz · 1 month ago

Arm stock declines massively as Qualcomm acquires RISC-V designer Ventana

www.techradar.com

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Arm stock declines massively as Qualcomm acquires RISC-V designer Ventana

www.techradar.com

cm0002@mander.xyz · 1 month ago

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RISC-V@programming.dev

riscv@programming.dev

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RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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