diff options
author | Takashi Kokubun <[email protected]> | 2022-12-23 14:46:39 -0800 |
---|---|---|
committer | Takashi Kokubun <[email protected]> | 2023-03-05 22:11:20 -0800 |
commit | 23a58105eeff3c0a4ba34d51c822c6d10e95c24b (patch) | |
tree | f1b111f2e81f8aae74c883b1cbfbe76255d55485 /lib/ruby_vm/mjit/compiler.rb | |
parent | 71595a37bac2b8d3dacfd22114f1d596416260f2 (diff) |
Implement callee-saved registers
Diffstat (limited to 'lib/ruby_vm/mjit/compiler.rb')
-rw-r--r-- | lib/ruby_vm/mjit/compiler.rb | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/ruby_vm/mjit/compiler.rb b/lib/ruby_vm/mjit/compiler.rb index ff0003c8bf..8a5614c081 100644 --- a/lib/ruby_vm/mjit/compiler.rb +++ b/lib/ruby_vm/mjit/compiler.rb @@ -58,8 +58,16 @@ module RubyVM::MJIT # ec: rdi # cfp: rsi + # + # Callee-saved: rbx, rsp, rbp, r12, r13, r14, r15 + # Caller-saved: rax, rdi, rsi, rdx, rcx, r8, r9, r10, r11 + # # @param asm [RubyVM::MJIT::X86Assembler] def compile_prologue(asm) + # Save callee-saved registers used by JITed code + asm.push(:rbx) + + # Load sp to a register asm.mov(:rbx, [:rsi, C.rb_control_frame_t.offsetof(:sp)]) # rbx = cfp->sp end @@ -103,6 +111,9 @@ module RubyVM::MJIT asm.mov([:rsi, C.rb_control_frame_t.offsetof(:sp)], :rbx) # cfp->sp = rbx end + # Restore callee-saved registers + asm.pop(:rbx) + asm.mov(:rax, Qundef) asm.ret end @@ -115,6 +126,7 @@ module RubyVM::MJIT C.dump_disasm(from, to).each do |address, mnemonic, op_str| puts " 0x#{"%p" % address}: #{mnemonic} #{op_str}" end + puts end end end |