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authorAlan Wu <[email protected]>2023-08-22 18:43:56 -0400
committerGitHub <[email protected]>2023-08-22 18:43:56 -0400
commitff552389137c2d0af16c63e82bfc7e123be30198 (patch)
treea7feaadafff1f4f26b3e62ea8c16529d976f79e6
parentc23e2e19b7a5e4b919a8b87de0269c128bbb9a5e (diff)
YJIT: x64: Split mem-to-mem Insn::Store like Insn::Mov
The ARM backend allows for this so let's make x64 consistent.
Notes
Notes: Merged: https://github.com/ruby/ruby/pull/8263 Merged-By: XrXr
-rw-r--r--yjit/src/asm/x86_64/mod.rs2
-rw-r--r--yjit/src/backend/x86_64/mod.rs2
2 files changed, 2 insertions, 2 deletions
diff --git a/yjit/src/asm/x86_64/mod.rs b/yjit/src/asm/x86_64/mod.rs
index 4ff89dafe3..4a7c7e5a84 100644
--- a/yjit/src/asm/x86_64/mod.rs
+++ b/yjit/src/asm/x86_64/mod.rs
@@ -635,7 +635,7 @@ fn write_rm_multi(cb: &mut CodeBlock, op_mem_reg8: u8, op_mem_reg_pref: u8, op_r
panic!("immediate value too large (num_bits={}, num={uimm:?})", num_bits);
}
},
- _ => unreachable!()
+ _ => panic!("unknown encoding combo: {opnd0:?} {opnd1:?}")
};
}
diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs
index c5f458cb20..60d0e8bf8d 100644
--- a/yjit/src/backend/x86_64/mod.rs
+++ b/yjit/src/backend/x86_64/mod.rs
@@ -291,7 +291,7 @@ impl Assembler
*out = asm.next_opnd_out(Opnd::match_num_bits(&[*truthy, *falsy]));
asm.push_insn(insn);
},
- Insn::Mov { dest, src } => {
+ Insn::Mov { dest, src } | Insn::Store { dest, src } => {
match (&dest, &src) {
(Opnd::Mem(_), Opnd::Mem(_)) => {
// We load opnd1 because for mov, opnd0 is the output