source: trunk/src/binutils/opcodes/fr30-dis.c@ 1113

Last change on this file since 1113 was 610, checked in by bird, 22 years ago

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1/* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-dis.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
8Free Software Foundation, Inc.
9
10This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12This program is free software; you can redistribute it and/or modify
13it under the terms of the GNU General Public License as published by
14the Free Software Foundation; either version 2, or (at your option)
15any later version.
16
17This program is distributed in the hope that it will be useful,
18but WITHOUT ANY WARRANTY; without even the implied warranty of
19MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20GNU General Public License for more details.
21
22You should have received a copy of the GNU General Public License
23along with this program; if not, write to the Free Software Foundation, Inc.,
2459 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
30#include <stdio.h>
31#include "ansidecl.h"
32#include "dis-asm.h"
33#include "bfd.h"
34#include "symcat.h"
35#include "libiberty.h"
36#include "fr30-desc.h"
37#include "fr30-opc.h"
38#include "opintl.h"
39
40/* Default text to print if an instruction isn't recognized. */
41#define UNKNOWN_INSN_MSG _("*unknown*")
42
43static void print_normal
44 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
45static void print_address
46 PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
47static void print_keyword
48 PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
49static void print_insn_normal
50 PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
51 bfd_vma, int));
52static int print_insn
53 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned));
54static int default_print_insn
55 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
56static int read_insn
57 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
58 CGEN_EXTRACT_INFO *, unsigned long *));
59
60
61/* -- disassembler routines inserted here */
62
63/* -- dis.c */
64static void print_register_list
65 PARAMS ((PTR, long, long, int));
66static void print_hi_register_list_ld
67 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
68static void print_low_register_list_ld
69 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
70static void print_hi_register_list_st
71 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
72static void print_low_register_list_st
73 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
74static void print_m4
75 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
76
77static void
78print_register_list (dis_info, value, offset, load_store)
79 PTR dis_info;
80 long value;
81 long offset;
82 int load_store; /* 0 == load, 1 == store */
83{
84 disassemble_info *info = dis_info;
85 int mask;
86 int index = 0;
87 char* comma = "";
88
89 if (load_store)
90 mask = 0x80;
91 else
92 mask = 1;
93
94 if (value & mask)
95 {
96 (*info->fprintf_func) (info->stream, "r%i", index + offset);
97 comma = ",";
98 }
99
100 for (index = 1; index <= 7; ++index)
101 {
102 if (load_store)
103 mask >>= 1;
104 else
105 mask <<= 1;
106
107 if (value & mask)
108 {
109 (*info->fprintf_func) (info->stream, "%sr%i", comma, index + offset);
110 comma = ",";
111 }
112 }
113}
114
115static void
116print_hi_register_list_ld (cd, dis_info, value, attrs, pc, length)
117 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
118 PTR dis_info;
119 long value;
120 unsigned int attrs ATTRIBUTE_UNUSED;
121 bfd_vma pc ATTRIBUTE_UNUSED;
122 int length ATTRIBUTE_UNUSED;
123{
124 print_register_list (dis_info, value, 8, 0/*load*/);
125}
126
127static void
128print_low_register_list_ld (cd, dis_info, value, attrs, pc, length)
129 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
130 PTR dis_info;
131 long value;
132 unsigned int attrs ATTRIBUTE_UNUSED;
133 bfd_vma pc ATTRIBUTE_UNUSED;
134 int length ATTRIBUTE_UNUSED;
135{
136 print_register_list (dis_info, value, 0, 0/*load*/);
137}
138
139static void
140print_hi_register_list_st (cd, dis_info, value, attrs, pc, length)
141 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
142 PTR dis_info;
143 long value;
144 unsigned int attrs ATTRIBUTE_UNUSED;
145 bfd_vma pc ATTRIBUTE_UNUSED;
146 int length ATTRIBUTE_UNUSED;
147{
148 print_register_list (dis_info, value, 8, 1/*store*/);
149}
150
151static void
152print_low_register_list_st (cd, dis_info, value, attrs, pc, length)
153 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
154 PTR dis_info;
155 long value;
156 unsigned int attrs ATTRIBUTE_UNUSED;
157 bfd_vma pc ATTRIBUTE_UNUSED;
158 int length ATTRIBUTE_UNUSED;
159{
160 print_register_list (dis_info, value, 0, 1/*store*/);
161}
162
163static void
164print_m4 (cd, dis_info, value, attrs, pc, length)
165 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
166 PTR dis_info;
167 long value;
168 unsigned int attrs ATTRIBUTE_UNUSED;
169 bfd_vma pc ATTRIBUTE_UNUSED;
170 int length ATTRIBUTE_UNUSED;
171{
172 disassemble_info *info = (disassemble_info *) dis_info;
173 (*info->fprintf_func) (info->stream, "%ld", value);
174}
175/* -- */
176
177void fr30_cgen_print_operand
178 PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
179 void const *, bfd_vma, int));
180
181/* Main entry point for printing operands.
182 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
183 of dis-asm.h on cgen.h.
184
185 This function is basically just a big switch statement. Earlier versions
186 used tables to look up the function to use, but
187 - if the table contains both assembler and disassembler functions then
188 the disassembler contains much of the assembler and vice-versa,
189 - there's a lot of inlining possibilities as things grow,
190 - using a switch statement avoids the function call overhead.
191
192 This function could be moved into `print_insn_normal', but keeping it
193 separate makes clear the interface between `print_insn_normal' and each of
194 the handlers. */
195
196void
197fr30_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
198 CGEN_CPU_DESC cd;
199 int opindex;
200 PTR xinfo;
201 CGEN_FIELDS *fields;
202 void const *attrs ATTRIBUTE_UNUSED;
203 bfd_vma pc;
204 int length;
205{
206 disassemble_info *info = (disassemble_info *) xinfo;
207
208 switch (opindex)
209 {
210 case FR30_OPERAND_CRI :
211 print_keyword (cd, info, & fr30_cgen_opval_cr_names, fields->f_CRi, 0);
212 break;
213 case FR30_OPERAND_CRJ :
214 print_keyword (cd, info, & fr30_cgen_opval_cr_names, fields->f_CRj, 0);
215 break;
216 case FR30_OPERAND_R13 :
217 print_keyword (cd, info, & fr30_cgen_opval_h_r13, 0, 0);
218 break;
219 case FR30_OPERAND_R14 :
220 print_keyword (cd, info, & fr30_cgen_opval_h_r14, 0, 0);
221 break;
222 case FR30_OPERAND_R15 :
223 print_keyword (cd, info, & fr30_cgen_opval_h_r15, 0, 0);
224 break;
225 case FR30_OPERAND_RI :
226 print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Ri, 0);
227 break;
228 case FR30_OPERAND_RIC :
229 print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Ric, 0);
230 break;
231 case FR30_OPERAND_RJ :
232 print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Rj, 0);
233 break;
234 case FR30_OPERAND_RJC :
235 print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Rjc, 0);
236 break;
237 case FR30_OPERAND_RS1 :
238 print_keyword (cd, info, & fr30_cgen_opval_dr_names, fields->f_Rs1, 0);
239 break;
240 case FR30_OPERAND_RS2 :
241 print_keyword (cd, info, & fr30_cgen_opval_dr_names, fields->f_Rs2, 0);
242 break;
243 case FR30_OPERAND_CC :
244 print_normal (cd, info, fields->f_cc, 0, pc, length);
245 break;
246 case FR30_OPERAND_CCC :
247 print_normal (cd, info, fields->f_ccc, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
248 break;
249 case FR30_OPERAND_DIR10 :
250 print_normal (cd, info, fields->f_dir10, 0, pc, length);
251 break;
252 case FR30_OPERAND_DIR8 :
253 print_normal (cd, info, fields->f_dir8, 0, pc, length);
254 break;
255 case FR30_OPERAND_DIR9 :
256 print_normal (cd, info, fields->f_dir9, 0, pc, length);
257 break;
258 case FR30_OPERAND_DISP10 :
259 print_normal (cd, info, fields->f_disp10, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
260 break;
261 case FR30_OPERAND_DISP8 :
262 print_normal (cd, info, fields->f_disp8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
263 break;
264 case FR30_OPERAND_DISP9 :
265 print_normal (cd, info, fields->f_disp9, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
266 break;
267 case FR30_OPERAND_I20 :
268 print_normal (cd, info, fields->f_i20, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
269 break;
270 case FR30_OPERAND_I32 :
271 print_normal (cd, info, fields->f_i32, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
272 break;
273 case FR30_OPERAND_I8 :
274 print_normal (cd, info, fields->f_i8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
275 break;
276 case FR30_OPERAND_LABEL12 :
277 print_address (cd, info, fields->f_rel12, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
278 break;
279 case FR30_OPERAND_LABEL9 :
280 print_address (cd, info, fields->f_rel9, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
281 break;
282 case FR30_OPERAND_M4 :
283 print_m4 (cd, info, fields->f_m4, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
284 break;
285 case FR30_OPERAND_PS :