source: trunk/src/binutils/gas/doc/c-mips.texi@ 10

@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2000
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node MIPS-Dependent
@chapter MIPS Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter MIPS Dependent Features
@end ifclear

@cindex MIPS processor
@sc{gnu} @code{@value{AS}} for @sc{mips} architectures supports several
different @sc{mips} processors, and MIPS ISA levels I through V, MIPS32,
and MIPS64.  For information about the @sc{mips} instruction set, see
@cite{MIPS RISC Architecture}, by Kane and Heindrich (Prentice-Hall).
For an overview of @sc{mips} assembly conventions, see ``Appendix D:
Assembly Language Programming'' in the same work.

@menu
* MIPS Opts::           Assembler options
* MIPS Object::         ECOFF object code
* MIPS Stabs::          Directives for debugging information
* MIPS ISA::            Directives to override the ISA level
* MIPS autoextend::     Directives for extending MIPS 16 bit instructions
* MIPS insn::           Directive to mark data as an instruction
* MIPS option stack::   Directives to save and restore options
@end menu

@node MIPS Opts
@section Assembler options

The @sc{mips} configurations of @sc{gnu} @code{@value{AS}} support these
special options:

@table @code
@cindex @code{-G} option (MIPS)
@item -G @var{num}
This option sets the largest size of an object that can be referenced
implicitly with the @code{gp} register.  It is only accepted for targets
that use @sc{ecoff} format.  The default value is 8.

@cindex @code{-EB} option (MIPS)
@cindex @code{-EL} option (MIPS)
@cindex MIPS big-endian output
@cindex MIPS little-endian output
@cindex big-endian output, MIPS
@cindex little-endian output, MIPS
@item -EB
@itemx -EL
Any @sc{mips} configuration of @code{@value{AS}} can select big-endian or
little-endian output at run time (unlike the other @sc{gnu} development
tools, which must be configured for one or the other).  Use @samp{-EB}
to select big-endian output, and @samp{-EL} for little-endian.

@cindex MIPS architecture options
@item -mips1
@itemx -mips2
@itemx -mips3
@itemx -mips4
@itemx -mips5
@itemx -mips32
@itemx -mips64
Generate code for a particular MIPS Instruction Set Architecture level.
@samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors,
@samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the
@sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and
@sc{r10000} processors.  @samp{-mips5}, @samp{-mips32}, and
@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, and
@sc{MIPS64} ISA processors, respectively.  You can also switch
instruction sets during the assembly; see @ref{MIPS ISA, Directives to
override the ISA level}. 

@item -mgp32
Assume that 32-bit general purpose registers are available.  This
affects synthetic instructions such as @code{move}, which will assemble
to a 32-bit or a 64-bit instruction depending on this flag.  On some
MIPS variants there is a 32-bit mode flag; when this flag is set,
64-bit instructions generate a trap.  Also, some 32-bit OSes only save
the 32-bit registers on a context switch, so it is essential never to
use the 64-bit registers.